For C++/SystemC HLS designs, Catapult Coverage offers HLS-aware code coverage, including statement, branch, FEC, toggle, and array access coverage. Additionally, it offers functional coverage that is SV-inspired and supports covergroups, coverpoints, bins, and crosses in C++/SystemC test benches.
Catapult Coverage

Key Features
Catapult Coverage Accelerates Verification Before RTL
To achieve high quality HLS-aware coverage without slow and expensive RTL Simulation, combine typical RTL metrics like statement, branch, expression, and toggle coverage with SystemVerilog functional verification approaches.
HLS-aware Code Coverage of C++/SystemC HLS Designs
By utilising the Questa UCDB (Unified Coverage Database), Catapult Coverage offers users a comprehensive set of Verification Management capabilities. This provides tools for viewing, managing, and analysing coverage data, combining and ranking the results of many tests’ coverage, implementing exclusions, producing desired reports, and integrating test plans.


Functional Coverage Inspired by SystemVerilog
Within C++/SystemC test benches, Catapult Coverage offers functional coverage that is inspired by SV with support for Covergroups, Coverpoints, Bins, and Crosses. A cover group can also be sampled at a specific time by using the sample() method, which is supported. This functional coverage can be connected to test plan requirements, just like classic RTL.
UCDB for Verification Management
Catapult Coverage writes coverage data to the Questa UCDB (Unified Coverage Database) that provides the user with a complete set of post-processing Verification Management tools. This includes support for analysis and reporting of coverage results, merging and ranking of tests, applying exclusions and integration of test plans.
