The verification of designs at the software, hardware and firmware level is one of the most important tasks to assure the correct functionality of a designed application. Simulation-based approaches allow the user to monitor the behavior of his/her circuit when faced with given stimuli. This is also known as functional verification. When the complexity of the designs grows, test benches also become more complex and thus require more time to be developed. For this reason, there is a high interest in the industry to reuse code for test benches and streamlining the verification process.
In this webinar, we shall discuss performing simulation using CLI (Command Line interface)
Tool that will be covered:
Questa Advanced Simulator
The Questa® Advanced Simulator combines high performance and capacity simulation with unified advanced debug and functional coverage capabilities for the most complete native support of Verilog, SystemVerilog, VHDL, SystemC, SVA, UPF and UVM.