On-Demand Webinar
Presenter: Avinash Keshav

ModelSim Users: Features & Tips You Don’t Know Yet

Brief Summary of Webinar:

ModelSim is a multi-language environment by Siemens EDA (formerly Mentor Graphics) for simulation of hardware description languages such as VHDL, Verilog and SystemC, and includes a built-in C debugger. ModelSim can be used independently, or in conjunction with Intel Quartus Prime, PSIM, Xilinx ISE or Xilinx Vivado. Simulation is performed using the graphical user interface (GUI), or automatically using scripts.

In this training you will learn the essential skills needed to create a simulation environment and what tools are available to quickly debug the root cause of design failures. Debug flows using waveforms, graphical dataflow for design connectivity, waveform compare for determining failures or viewing and analyzing memories will be highlighted. This training will also show you what a technical resource are available to expand your verification knowledge.

Who Should Attend?

  • Project Leads
  • FPGA/ASIC Design & Verification Engineers

Post the session, the participants will be able to:

  • Determine a simulation workflow
  • Create a simulation environment
  • Learn essential debug tools
  • Know where to find essential learning resources


Presenter - Avinash Keshav

More than seven years of experience in technical support of EDA tools while consulting the clients, understanding their requirements, and suggesting solutions in line with their requirements, explaining the capabilities of our software and demonstrating its usefulness towards their design goal. Knowledge of sales & marketing cycle of research and engineering product and FAE’s role in this cycle for maintaining the product relevance in the departments, which procure the EDA tools.

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