Background:
ModelSim is a multi-language environment by Siemens EDA (formerly Mentor Graphics) for simulation of hardware description languages such as VHDL, Verilog and SystemC, and includes a built-in C debugger. ModelSim can be used independently, or in conjunction with Intel Quartus Prime, PSIM, Xilinx ISE or Xilinx Vivado. Simulation is performed using the graphical user interface (GUI), or automatically using scripts.
In this training you will learn the essential skills needed to create a simulation environment and what tools are available to quickly debug the root cause of design failures. Debug flows using waveforms, graphical dataflow for design connectivity, waveform compare for determining failures or viewing and analyzing memories will be highlighted. This training will also show you what a technical resource are available to expand your verification knowledge.
